Samsung Galaxy S10 is not expected to be unveiled until next year, but leaks have already been pouring in from all corners. The South Korean technology giant is set to celebrate the 10th anniversary of its Galaxy S lineup in 2019 with the launch of the Galaxy S10. Meanwhile, rumours have already started to tip details such as a dual front and triple rear cameras, 6.44-inch display, and 3D Face Unlockamong others. But thanks to a new leak, we can also expect the Galaxy S10 to be powered by an Exynos 9820 processor, coupled with Mali-G76 MP18 GPU. Meanwhile, Samsung has separately started the mass production of its fifth generation 256Gb V-NAND modules that is being claimed to feature “industry’s fastest data transfer speed.”
As per a tweet posted by popular tipster Ice Universe, Samsung’s next premium processor will come with the name Exynos 9820. It appears that the SoC will be equipped with a total of eight CPU cores as part of a DynamIQ architecture. Additionally, the layout comes with two Exynos M4 big cores and two Cortex-A75 or Cortex-A76 medium cores. Also, four Cortex-A55 smaller cores will complete the setup.
Paired with this, there will be a new GPU that is said to be the Mali-G76 MP18, Ice Universe says in another post on Weico. The Mali-G76 could have 18 cores, same as the G72 in the Exynos 9810. The British chip designer ARM had announced the new processor design earlier this year.
Coming to the 256Gb V-NAND memory that has entered mass production, Samsung says it has a data transfer rate of 1.4Gbps because of the Toggle DDR 4.0 interface. The company claims that it is a 40-percent increase from its 64-layer predecessor. Meanwhile, the operating voltage has been reduced from 1.8 volts to 1.2 volts. The new V-NAND is also claimed to have the fastest data write speed till now at 500-microseconds. It is roughly a 30 percent improvement over the write speed of the previous generation. Also, the response time to read-signals has been significantly reduced to 50 microseconds.
Samsung’s fifth-generation V-NAND packs over 90 layers of ‘3D charge trap flash (CTF) cells,’ that is said to be “the largest amount in the industry.”, stacked in a pyramid structure with microscopic channel holes vertically drilled throughout. These hundred-nanometres-wide channel holes contain 85 billion CTF cells that can store 3 bits each. Also, production output has increased 30 percent and the height of the cell layer has reduced by 20 percent.
The company will introduce 1-terabit (Tb) and quad-level cell (QLC) offers in the future as well, Samsung said in a statement. Kye Hyun Kyung, Executive Vice President of Flash Product and Technology at Samsung Electronics, added, “In addition to the leading-edge advances we are announcing today, we are preparing to introduce 1-terabit (Tb) and quad-level cell (QLC) offerings to our V-NAND lineup that will continue to drive momentum for next-generation NAND memory solutions throughout the global market.”